The present invention relates to a semiconductor device with a dual damascene type via contact structure and a method for the manufacture of same and, more particularly, to an improvement in or relating to the via contact filling layer portion of the semiconductor device.
For the formation of wiring layers, the damascene technique has so far been employed. The manufacturing steps thereof are simple, and in addition, it is required to apply no RIE treatment step to the metal layers. It is difficult to form fine metal patterns by the use of the RIE step.
FIGS. 27 to 33 are, respectively, sectional views showing the structure at the respective manufacturing steps in the case of forming a via contact wiring structure by the use of the RIE method. FIGS. 34 to 39 are, respectively, sectional views showing the structure at the respective manufacturing steps in the case of forming a dual damascene type via contact by the use of the damascene method.
According to the RIE method, first, on the upper surface of a semiconductor substrate 12 on which a first metal wiring layer, normally an aluminum wiring layer 22 is formed, a first inter-layered insulation film 24 is formed by the use of the CVD (Chemical Vapor Deposition) method as shown in FIG. 27 (Step 1). Next, as shown in FIG. 28, a via contact hole 32 is formed by performing an RIE treatment in the inter-layered insulation film 24 (Step 2). Between the semiconductor substrate 12 and the first aluminum wiring layer 22, a barrier layer 14 composed of SiO2 is provided. Subsequently, as shown in FIG. 29, tungsten is deposited, by the use of the sputtering method, to form a tungsten layer 62 over the whole surface of the semiconductor substrate 12 having the structure processed as mentioned above, whereby the via contact hole 32 is filled up with said tungsten as shown in FIG. 29 (Step 3), Then, the tungsten on the upper surface of the inter-layered insulation film 24 is removed by performing a CMP (Chemical-Mechanical Polishing) treatment, so that, as shown in FIG. 30, the tungsten is left only in the via contact hole to form a via contact filling layer 38 (Step 4). Subsequently, on the whole upper surface of the semiconductor substrate 12 having the structure thus processed, a metal wiring material, which is normally aluminum, is deposited by the use of the CVD method or the sputtering method, whereby a metal wiring material layer 64 is formed as shown in FIG. 31 (Step 5). Then, the thus formed metal wiring material layer 64 is patterned by an RIE treatment to form a second metal wiring layer 66 as shown in FIG. 32 (Step 6). Subsequently, over the whole surface of the semiconductor substrate 12 having the structure thus processed, a second inter-layered insulation film 68 is formed by the use of the CVD method (Step 7).
On the other hand, in the case of employing the damascene method, first, as shown in FIG. 34, a first thick inter-layered insulation film 24 is formed, by the use of the CVD method, on the upper surface of a semiconductor substrate 12 on which a first metal wiring layer 22, normally an aluminum wiring layer, is formed (Step 1). Then, as shown in FIG. 35, on the inter-layered insulation film 24 thus formed, a via contact hole 32 is formed by an RIE treatment (Step 2). Next, as shown in FIG. 36, a shallow wiring groove 28 is formed, by an RIE treatment, in a portion of the inter-layered insulation film 24 which portion includes the upper portion of the via contact hole. As a result, there is formed a dual damascene type via contact structure having a groove 28 and a via contact hole 26 lying below the groove 28. Subsequently, tungsten is deposited, by the use of the sputtering method, to form a tungsten layer 72 over the whole surface of the semiconductor substrate 12 having the structure processed as mentioned above, whereby the groove 28 and the via contact hole 26 are filled up with the tungsten as shown in FIG. 37 (Step 4). Then, the portion of the tungsten lying on the upper surface of the inter-layered insulation film 24 is removed by a CMP treatment, whereby a second metal wiring layer 74 composed of tungsten is formed in the groove and the via contact hole as shown in FIG. 38 (Step 5). Next, as shown in FIG. 39, over the whole surface of the semiconductor substrate 12 having the structure processed as mentioned above, a second inter-layered insulation film 48 is formed by the use of the CVD method (Step 6).
As may be apparent from the foregoing description concerning the RIE method and the damascene method, the number of manufacturing steps is smaller in the case of the damascene method than in the case of the RIE method. Further, the damascenene method is suited for the formation of fine metal patterns, too. As stated above, the damascenene method is superior in many points to the RIE method, but the damascene method has the following defects:
That is, in case the dual damscene groove and the via contact hole are to be filled up with aluminum, the bottom portion of the via contact hole which has a high aspect ratio (height/width ratio) can hardly be filled up since the reflowability of the aluminum is not so high. If the temperature at the time of depositing the aluminum is enhanced, then the reflowability of the aluminum is increased, but, if the temperature is made too high, then the aluminum will become round due to its surface tension. That is, it is difficult to obtain a via contact filling having a high aspect ratio by the use of aluminum. On the other hand, tungsten has a high reflowability and therefore can fill up even the bottom portion of the via contact hole having a high aspect ratio, but the wiring resistance of tungsten is high.
As described above, in the case of the conventional dual damascene type via contact wiring structure, if the via contact hole is to be filled up with aluminum, it is difficult to fill up the via contact hole, which has a high aspect ratio, as far as its bottom portion. On the other hand, in case the via contact hole is filled up with tungsten, the wiring resistance becomes high. Due to this, the conventional dual damascene formation method is not applicable to the formation of a multi-layer wiring structure.
As described above, in the formation of the conventional dual damascene type via contact structure, it is difficult to fill up the via contact hole which has a high aspect ratio as far as its bottom portion by the use of the metal material due to the lowness in reflowability of the metal. Further, tungsten is used as the metal material, the wiring resistance become high, which is quite a problem.
The present invention has been made in view of these circumstances, and it is the object of the invention to provide a semiconductor device with a dual damascene type via contact structure which is constituted in such a manner that the via contact hole having a high aspect ratio can be filled up as far as its bottom portion with the metal material, and the conventional problem or defect that, due to the high-temperature heat treatment performed at the time of depositing a metal material for the formation of the second metal wiring, the first metal wiring layer is melted is eliminated, so that the application of the dual damascene type via contact structure to a multi-layer wiring structure becomes possible.
In order to achieve the object mentioned above, a semiconductor device with a dual damascene type via contact structure according to the present invention comprises a first metal wiring formed on a semiconductor substrate; an inter-layered insulation film formed on the semiconductor substrate including the first metal wiring; a dual damascene structure having a groove and a via contact hole which are formed in the inter-layered insulation film and lead to the first metal wiring; a via contact filling layer formed by filling up, with a metal material, the interior of the via contact hole of the dual damascene structure formed in the inter-layered insulation film, the via contact filling layer being contacted with the first metal wiring; and a second metal wiring formed in the groove of the dual damascene structure, the groove being contacted with the via contact filling layer.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the first metal wiring may have a groove formed in the surface area thereof through the groove and the via contact hole of the dual damascene structure, and the filling material may fill up the interior of the groove in the surface area of the first metal layer.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be formed in the shape of a rivet.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of a metal which has a high reflowability.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of a metal which has a low thermal conductivity.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the first metal wiring and the second metal wiring may be composed of a metal which has a high electrical conductivity.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the semiconductor device may further comprise a barrier layer formed on the via contact filling layer and the inter-layered insulation film.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the barrier layer may be composed of Ti, TiN or WN.
Another semiconductor device with a dual damascene type via contact structure comprises an inter-layered insulation film formed on an underlying wiring; a dual damascene structure having a groove and a via contact hole which are formed in the inter-layered insulation film and lead to the underlying wiring; a groove formed in the surface area of the underlying wiring through the groove and the via contact hole of the dual damascene structure; a rivet shape via contact filling layer formed in such a manner that the interior of the via contact hole of the dual damascene structure formed in the inter-layered insulation film and the interior of the groove of the dual damascene structure formed in the surface area of the underlying wiring are filled up with a filling material until the via contact filling layer extends upward from the upper surface of the via contact hole and extends around the upper surface of the via contact hole; and an upper-layered wiring formed in the groove of the dual damascene structure, the upper-layered wiring being contacted with the via contact filling layer.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of a metal which has a high reflowability.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of a metal which has a low thermal conductivity.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the underlying wiring and the upper-layer wiring may be composed of a metal which has a high electrical conductivity.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the semiconductor device may further comprise a barrier layer formed on the via contact filling layer and the inter-layered insulation film.
In the semiconductor device with a dual damascene type via contact structure according to the present invention, the barrier layer may be composed of Ti, TiN or WN.
A method for the manufacture of a semiconductor device with a dual damascene type via contact structure, comprises the step of forming a first metal wiring on a semiconductor substrate; the step of forming an inter-layered insulation film over the semiconductor substrate including the first metal wiring; the step of forming, in the inter-layered insulation film, a dual damscene structure having a groove and a via contact hole which lead to the first metal wiring; the step of filling up, with a filling material, the interior of the via contact hole of the dual damascene structure formed in the inter-layered insulation film to form a via contact filling layer contacted with the first metal wiring; and the step of forming, in the groove of the dual damscene structure, a second metal wiring contacted with the via contact filling layer.
In the method for the manufacture of a semiconductor device with a dual damscene type via contact structure according to the present invention, the filling material may be deposited for filling up the interior of the via contact hole of the dual damascene structure by the use of the selective CVD method.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact hole of the dual damascene structure may be filled up with the filling material to form the via contact filling layer in the via contact hole until the via contact filling layer extends up to the upper surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact hole may be filled up with the filling material to form the via contact filling layer in the via contact hole until the via contact filling layer is formed only within the extent of the upper surface of the via contact hole and extends upward from the upper surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact hole may be filled up with the filling material to form a via contact filling layer in the via contact hole until the via contact filling layer extends upward from the upper surface of the via contact hole and extends beyond the extent of the upper surface of the via contact hole and onto the peripheral portion adjacent to the upper surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the method may further comprise the step, performed following the step of forming the groove and the via contact hole of the dual damascene structure in the inter-layered insulation film, of forming a groove in the surface area of the first metal wiring through the groove and the via contact hole of the dual damascene structure, and, in the step of forming in the via contact hole formed in the inter-layered insulation film the via contact filling layer contacted with the first metal wiring, even the interior of the groove in the surface area of the first metal wiring may be filled up with the filling material.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the groove formed in the surface area of the first metal wiring may be formed by isotropically etching the first metal wiring through the groove and the via contact hole of the dual damascene structure.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the groove formed in the surface area of the first metal wiring may be formed only in the extent of the lower surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the groove formed in the surface area of the first metal wiring may extend beyond the extent of the lower surface of the via contact hole and onto the peripheral portion adjacent to the lower surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the interior of the groove formed in the surface area of the first metal wiring and the via contact hole may be filled up with the filling material to form the via contact filling layer until the via contact filling layer extends up to the upper surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the interior of the groove formed in the surface area of the first metal wiring and the via contact hole may be filled up with the filling material to form the via contact filling layer until the via contact filling layer extends upward from the upper surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the interior of the groove formed in the surface area of the first metal wiring and the via contact hole may be filled up with the filling material to form the via contact filling layer until the via contact filling layer extends beyond the upper surface of the via contact hole and onto the peripheral portion adjacent to the upper surface of the via contact hole and extends upward from the upper surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be formed in the shape of a rivet.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of a metal which has a high reflowability.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of a metal which has a low thermal conductivity.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of tungsten.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of copper.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the first metal wiring and the second metal wiring may be composed of a metal which has a high electrical conductivity.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the first metal wiring and the second metal wiring may be composed of aluminum.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the first metal wiring and the second metal wiring may be composed of an aluminum compound.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the method further may comprise the step, performed following the step of forming the via contact filling layer, of forming a barrier layer on the via contact filling layer and the inter-layered insulation film.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the barrier layer may be composed of Ti, TiN or WN.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the step of forming the second metal wiring may comprise the step of forming a metal layer by depositing a metal material in the groove and on the inter-layered insulation film; and the step of polishing the formed metal layer to leave only the metal layer portion in the groove.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the metal layer may be formed in such a manner that the metal material is deposited in the groove and on the inter-layered insulation film by the use of the CVD method.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the step of leaving only the metal layer portion in the groove may comprise the step of polishing, by the use of the CMP method, the metal layer formed in the metal layer forming step.
Another method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to a fourth aspect of the present invention, comprises the step of forming an inter-layered insulation film on an underlying wiring; the step of forming, in the inter-layered insulation film, a dual damscene structure having a groove and a via contact hole which lead to the underlying wiring; the step of forming a groove in the surface area of the underlying wiring through the groove and the via contact hole of the dual damascene structure; the step of filling a filling material into the interior of the via contact hole formed in the inter-layered insulation film and the interior of the groove formed in the surface area of the underlying wiring to form a via contact filling layer until the via contact filling layer extends upwardly from the via contact hole so that the via contact filling layer has a rivet-shape; and the step of forming, in the groove of the dual damscene structure, an upper-layered wiring contacted with the via contact filling layer.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the filling material may be filled by the use of the selective CVD method.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the groove in the surface area of the underlying wiring may be formed by isotopically etching the underlying wiring through the groove and the via contact hole of the dual damascene structure.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of a metal which has a high reflowability.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of a metal which has a low thermal conductivity.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the underlying wiring and the upper-layer wiring may be composed of a metal which has a high electrical conductivity.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the method may further comprise the step, following the step of forming the via contact filling layer, of forming a barrier layer on the via contact filling layer and the inter-layered insulation film.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the barrier layer may be composed of Ti, TiN or WN.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the step of forming the upper-layer wiring may comprise the step of forming a metal layer by depositing a metal material in the groove and on the inter-layered insulation film; and the step of polishing the thus formed metal layer to leave only the metal layer portion in the groove.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the metal layer may be formed by depositing the metal material in the groove and on the inter-layered insulation film by the use of the CVD method.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the step of leaving only the metal layer portion in the groove may comprise the step of polishing, by the use of the CVD method, the metal layer formed at the metal layer formation step.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the groove formed in the surface area of the first metal wiring may be formed only in the extent of the lower surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the groove formed in the surface area of the first metal wiring may extend beyond the extent of the lower surface of the via contact hole and onto the peripheral portion adjacent to the lower surface of the via contact hole.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of tungsten.
In the method for the manufacture of a semiconductor device with a dual damascene type via contact structure according to the present invention, the via contact filling layer may be composed of copper.
Additional object and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The object and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinbefore.